|
Home | AVR | FPGA | M680x | Zilog Z8 | Zilog Z80 | Hitachi SH | Transputer | Linux | DOS |
|
|
|
|
Z8 Multiplexed 11 digit VFD display controller |
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
The Z86E08 micro-controller is used in this application to control an 11 digit seven segment Vacuum Fluorescent Display (VFD) module. There are two PCB's drawn up to suit two types of voltage regulator. The first is a small DC-DC switch mode type, while the second is a simpler 7805 linear type. It can drive small calculator type displays, or a larger types, but care must be taken to ensure the filament voltage is not exceeded. The type used in this controller is a Futaba 11-ST-26ZA Vacuum Fluorescent Display that can be acquired from Jaycar Electronic component distributors (Australian) as part number ZD1880, or from Futaba distributors. If you happen to have an old VFD calculator in the garage that doesn't work any more then pull out the display part and re-use it on this project. The Zilog Z86E08 (Z8) microprocessor is programmed to control segment and digit signals and subsequently the scan rate. It also supports digital pulse counters which are reflected on the display as an incrementing count. The software also supports a software style UART to enable much faster and more flexible display data control. The firmware that runs on the Z8 knows the difference between LED and VFD type displays, via Shorting link 1, so compensates for the differences in the display technology automatically. Installing this shorting link will enable the software to assume the display is a VFD type. Selecting the mode in this way allows reuse of the same firmware on one chip to drive either LED or VFD type numerical displays. Contents
Building this circuit as per this schematic diagram demonstrates an 11 digit VFD controller with a filament powered by a pulsed DC voltage. The VFD filament is controlled directly by the CPU and will be pulsed at a frequency of 120Hz with a 50/50 duty cycle. The frequency can be increased up to 9600Hz but at some cost to the system performance. Driving a filament this way is not very good for displays with large digit counts like this one. In fact driving six digits will be the maximum without the luminance tapering along the length of the display to a noticeable level. Another drawback with this type of circuit is the display driver's Vbb input needs to be driven at 12 volts or higher to get any reasonable light levels out of the display. However, the circuit is quick, cheap and does work. The VFD segments (anodes) and digit selects (grid) are both controller by a 20-bit latch. VFD's require both grid and anode to be at a higher voltage than ground to allow segment illumination. This means that VFD's are not the same as LED's to control. LED's (common cathode types) require digit selects to be ground while their segments taken positive via current limiting resistors. VFD's, on the other hand, require both: lighted segments (Anodes), and digit selects (Grid) to be positive with respect to ground. The negative part of the device is the filament (heater). Building VFD circuit as per this schematic diagram shows an 11 digit VFD controller with a filament powered by an AC step up transformer. This is a far better solution over the previous Pulse DC filament method and maintains consistent light levels across all digits. The AC generator is controlled by an LM555 free running oscillator that provides an approximate 70KHz 50% duty cycle pulse into a tiny power transformer. The transformer decouples DC to AC and steps it up a little to give the required 4VAC filament drive. One side of the secondary is fixed to ground allowing the other terminal to swing between +ve and -ve. In effect if provides a useful alternating waveform that is referenced to ground allowing the grid and segment signals to behave correctly. Frequency of operation is everything to this circuit. ie: increase the frequency and the output voltage goes up, decrease it and the output voltage goes down with the side effect of using more current. At 70KHz the primary circuit draws close to 67mA. At 27KHz it will draw 258mA. So speed of oscillation is everything. A further improvement to this part of the circuit is the oscillator: If it were a sine wave generated as opposed to the existing square wave type then all would work cleaner and more efficiently. So maybe this idea can be the basis to a new design revision. The transformer is straight forward enough to build. Use the dimensions in the following table to construct it. Wind the primary onto the core first. If you have access to very thin wire then increasing the winding count by five will allow more efficient coupling and less drive current needed at the primary.
This circuit works very well in practice and produces a very desirable linear luminance along the length of the entire display. The Vbb input to the display controller still needs 12 volts to be present and if 15 volts is provided instead the display lights up super bright! However, there is a limit to the Vbb drive voltage as determined by the VFD manufacturer. The VFD segments (anodes) and digit selects (grid) are both controller by a 20-bit latch. VFD's require both grid and anode to be at a higher voltage than ground to allow segment illumination. This means that VFD's are not the same as LED's to control. LED's (common cathode types) require digit selects to be ground while their segments taken positive via current limiting resistors. VFD's, on the other hand, require both: lighted segments (Anodes), and digit selects (Grid) to be positive with respect to ground. The negative part of the device is the filament (heater). AC FILAMENT CIRCUIT WITH LOCAL Vbb generator. This circuit is not finished, however, the Vbb voltage is generated by a another secondary winding on the tiny power transformer and rectified. The resultant voltage of 14 volts DC can be feed into Vbb of the VFD buffer/latch to produce a very bright display. The theory of operation follows the same ideas as the previous attempt. However, this design produces Vbb Voltages too. So the whole circuit can be powered from a single 5 Volt rail. In all cases the display device is a VFD and so an Allegro 20-bit VFD driver latch is used to control the display device. The VFD segments (anodes) and digit selects (grid) are both controller by a 20-bit latch. VFD's require both grid and anode to be at a higher voltage than ground to allow segment illumination. This means that VFD's are not the same as LED's to control. LED's (common cathode types) require digit selects to be ground while their segments taken positive via current limiting resistors. VFD's, on the other hand, require both: lighted segments (Anodes), and digit selects (Grid) to be positive with respect to ground. The negative part of the device is the filament (heater). There are two very good application notes on VFD control circuits that I have found so far. It is useful reading if you intend to understand the operation of these devices in detail:
The firmware has been written in assembler code to extract the most from the microprocessor. A lot of functionality has been included into the program with two main features, besides driving the VFD displays:
The firmware also supports some pretty neat tricks to get it to do all the tasks required and still keep up with time while maintaining a flicker free display. For example it can continue to keeping count of the arriving digital clocks presented at input CLOCK while interpreting data received through its software UART. On the prototype an 11 digit display is refreshed 125 times per second making it fast enough to limit the strobing effect when moved suddenly. Such a scan rate for a 11 digit display translates to each digit being lit for a period of 8.8 milliseconds. To light each digit in that time means a 20-bit data stream has to be clocked into the 20-bit driver/latch before 8.8 milliseconds is up. It actually does this in less than 300 microseconds. Even so it does not leave a lot of time to do much else. But there are tricks that can be applied in the software to extract that extra time from a very busy little microprocessor. The software has been written to exploit a 10MHz master clock driving the system. All delay counters and UART bit times have been calibrated to use this clock speed to its optimum (10MHz). ABOUT THE DISPLAY DEVICE The program will control a 20 bit latch/driver which in turn controls the VFD segments and digit selects. The software expects a VFD multiplexed display to be the display device. In order to display different data in each digit requires that the digits be multiplexed. This means one digit is given its segments to light while all others are turned off. Then a little bit later the next digit gets its chance to light its segments and so on until all 11 digits have been displayed. After that it is all repeated again and again. To set the Decimal Point on a digit, or many digits, of the display can be achieved through setting up the DP place through the UART then switching the display mode back to counter/latch mode. In counter latch mode "leading zero suppression" is active meaning that all zeros left of the current count will be blanked out. Its similar to using a calculator. The result "1245" shows as "1245" and not "00000001245". The later is how the actual count is representation in memory so the computer does a bit of filtering for our benefit. CLOCK/COUNTER DIGIT INPUT The program also accepts raw digital controls into the "LATCH", "CLOCK", "RESET" and "BLANK" inputs. These control the counters in CPU memory in a serial method. The clock input directly drives the internal counter to allow counts up to 50KHz to be captured. Anything faster than this will be lost and you may have to place a prescaler circuit in the clock circuit. There is a prescaler on Timer/counter #1 which is not used here and that can be set to a maximum of 63 counts, the clock frequency can then be increased to 50K*64=3.15MHz before clocks begin to be lost. However, there is a limit of 10MHz demanded by the z8's counters and silicon design. SOFTWARE UART To change all digits quicker can be achieved by delivering data through the software UART. A special control packet is set up to ensure correct data is received and displayed. Once data begins to roll in through the serial UART then data from "CLOCK" is not shown on the display, however, the received clocks are still counted and stored away. The UART can instruct this software to revert back to the CLOCK/COUNTER mode with a single command within the packet ('+') or a reset pulse on the "RESET" input. Using the UART to control the display is simple, it can set any digit with any display data you like. 14 bytes are all that is required to fill out the complete display. At 2400bps this would take 40mS to complete. Z8 (86E04/8) pin allocations are:
CPU FUNCTIONAL BLOCK RESOURCE ALLOCATION
UART COMMUNICATION PROTOCOL and CONTROL CODES
Using the communications into the device with this protocol is simple. Every communication begins with a [SOH] character and ends by a [CR] character. There does not have to be anything in-between, or there can be a million characters in-between. However, to get something meaningful shown on the display requires there to be present in the middle some control codes as shown in this table. Remember that at the moment a [SOH] character is received the operating mode of the controller will flip over to display mode. The digital counter will have no effect on displayed data, even though the counter is still running and registering clocks. Another point to keep in mind is that the digit pointer is always reset to position zero (0). It is the right most digit on the display so feeding numbers into the display goes in backwards. ie: The rightmost digit (unit) is first into the controller. DETERMINE CONTROL RESPONSE This packet will force the controller to say something. It can be very useful in determining in the controller is plugged in and still working. Places to use this type of feature is in systems that "auto-detect" their hardware and peripheral list. [SOH][PING][CR] response from controller is [PINGRSP] CLEAR ALL DIGITS TO BLANK This packet will remove all displayed data from the display, accept the decimal points and commas. [SOH][BLNK][BLNK][BLNK][BLNK][BLNK][BLNK][BLNK][BLNK][BLNK][BLNK][BLNK][BLNK][CR]
LOAD DISPLAY WITH VARIABLE LENGTH DIGIT This packet will display the number "3210" on the display. All digits are right justified. [SOH]['0']['1']['2']['3'][CR] PLACE DECIMAL POINT AT SECOND DIGIT FROM RIGHT This packet is going to set the decimal point at the second digit from the right and the flick the operating mode over to counter/latch. The data displayed at any digit is of no concern since the mode switch will lock onto the current counter value in memory. [SOH][['0']['0'][DP][RS][CR] CLEARING DP and COMMA settings If your displays has filled up with randomly placed decimal points or commas then it can be cleared away using a packet like this one. [SOH][ND][ND][ND][ND][ND][ND][ND][ND][ND][ND][ND][ND][CR] Data Sheets for chips used in this design:
The source code can be compiled using Zilog's Z8 CCP Emulator (Order code: Z86CCP00ZEM) downloadable from www.zilog.com. To program the Z86E08 you will need to get a hold of a blank chip and a programmer. Zilog also provides these in at least one form: Z8 CCP Emulator (Order code: Z86CCP00ZEM)
|
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
This page was last updated: Friday, February 07, 2003 14:44 Au EST.
Copyright © C.A.T.E 2001-02
