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IP6800

M6800 CPU Soft-core in FPGA

Scott Baker released an adapter that emulates the original M6800 CPU with a VHDL synthesis-able soft-core in FPGA. IP6800 is a functional hardware emulation of the original microprocessor's instruction set. Electrical characteristics (e.g. signal rise/fall times, delay times and signal levels) are dependent on the FPGA.

IP6800 can be used in situations where redesign costs are prohibitive, existing hardware install base is too large to change overnight, software source and knowledge has been lost in time, or you would just like to see the microprocessor come alive again. IP6800 can do that for you.

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VGA6800

M6800 VGA Video Controller

Not only can it display VGA graphics but it supports fast drawing speeds that would fool any observer. It is hard to imagine that such a tiny obsolete CPU could do so much.

The M6800 8-bit microprocessor rises again to show off its abilities in the graphics arena and does it with speed and style. It is for real, does exist, and works fast.

FPGA logic has been designed with flexibility so that it can be adapted to any 8-bit microprocessor that can address more than 256 bytes externally.

The downloadable files have been provided to suit Altera's University Board (Version U1). If you have access to this item then it is a simple matter of trying it out without CPU, or build the M6800 CPU section and make the whole lot work.

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M6800 Emulator

Binaries Version 1.2

Click here to Download it now (58KB ZIP)

The program only runs in text mode within an MSDOS box or equivalent and in 16-bit mode only. After all I wrote it on a 8088 Toshiba portable while travelling on the train to work. In those days any program with a GUI front end was only just beginning to be established.

This version of the emulator has the "ROL" instruction fixed so often reported buggy. The fixed program was available shortly after the original program had been release in 1991 but it seems the fix never made it to the wider community.

M6800 Emulator

Source Code Version 1.0

Click here to Download it now (160KB ZIP)

It is Version 1.0 because I can not find Version 1.2 source code. When it is found the source code it will be presented here. There were very few changes between Version 1.0 and Version 1.2 though. Changes made were a fix to the "ROL" instruction and the disassembly format changed to appear as described in every other book on the subject.

The program was written in assembler for one reason - speed. The 8088 system it was written for only just produced usable results but did produce a through-put close to the original CPU it was intended to emulate.

The source code presented here can be used in any way you wish.

 Dream 6800

M6800: Dream 6800
Home Video Computer

Electronics Australia printed articles:

 

Dream 6800 PSU (Article by Month of print)
June 1979	1 | 2 | 3
These pages are reproduced from Electronics Australia by arrangement with Silicon Chip Publications Pty Ltd.

 

Dream 6800 RAM Expansion (Article by Month of print)
December 1980	1 | 2 | 3
These pages are reproduced from Electronics Australia by arrangement with Silicon Chip Publications Pty Ltd.

 

DREAM 6800 RTTY Decoder (Article by Month of print)
January 1981	1 | 2 | 3 | 4 | 5 | 6
These pages are reproduced from Electronics Australia by arrangement with Silicon Chip Publications Pty Ltd.

Its purpose was a Home Video Computer the average home electronics. and computer hobbyist, could put together a personal computer that would display block graphics to a television. It is programmed in Chip-8 ["higher level language"] and M6800 assembler with many games written for it. Programs are saved, and restored, using an audio cassette tape.

The video screen is a bitmap of 64 by 32 pixels using  256 bytes of RAM as the video page. Each bit actually represented a pixel on the screen. The pixels were quite large and appeared reasonably chunky.

Even so, the graphics and computer system were very good for all sorts of work and even experiments into computers. 

Many users adapted the computer to HAM radio, Shop front displays, Computer design tools, EPROM programmers, communications terminal etc. Even with its chunky graphics, and small memory size, it found varied uses in many homes, schools,  and businesses.

The schematic diagram supplied here is a redrawn version of the original allowing a smaller sized PDF file to be created rather than a large scanned image.

Printed Circuit Board's can still be purchased from RCS Design [http://www.cia.com.au/~rcsradio] for a one off cost of AUD50.00. (Price was valid as of May, 2002.)

This page has been dedicated to collecting as much of  the programs and information into one place for the purposes historical reasons and information preservation.

 Dream 6800 PSU

M6800: Dream 6800 PSU
Power Supply Unit
(Revised a little from the original)

This supply provides the same supply rails but without the need for an AC power transformer.  A 15VDC plug pack will be sufficient, and is achievable by using an LT1054 inverting DC-DC regulator. It converts a +ve rail into a -ve.

The 5Volt rail is provided by two 7805 linear voltage regulators coupled together, reducing the load on each moving it further from maximum operating conditions. The whole circuit will run quite cool given a reasonable heat sink.

A switching regulator (Switch Mode Power Supply - SMPS) would be an even better, and more efficient, circuit to use for the 5V rail, however, the chips are not so easy to get. Even so there are some really good parts out there these days. e.g.: The package is a DIP18, uses some caps, a toroidal 100uH inductor and pumps out 3.5A at 5V (no heat sink). The part is supplied from Infineon and marked L4973D5.1 with an input range of 8VDC - 36VDC.

M6801 Emulator

Binaries Version 1.0

Click here to Download it now (46KB ZIP)

The program only runs in text mode within an MSDOS box or equivalent and in 16-bit mode only. The M6801 CPU supports a few more instructions that allow better compiler generated code and was aimed at single chip system solutions.

M6801 Emulator

Source Code Version 1.0

Click here to Download it now (97KB ZIP)

The program was written in assembler for one reason - speed. The 8088 system it was written for only just produced usable results but did produce a through-put close to the original CPU it was intended to emulate.

The source code supplied here can be used in any way you wish.

E.A.R.S. 
Real Time Kernel

Click here to Download it now (66KB ZIP)

The source code held in this download archive was, and still is, used to form the multi-tasking kernel of a small M6802 based computer. The M6802 CPU is binary compatible with the M6800, it just had a bit of RAM and an internal clock oscillator on chip.

The "Real Time OS" distributed with the 68EM package is this program. There is also a public domain assembler bundled with it so that you don't have to search all over the place for it.

This kernel will run quite well under 68EM. But remember to set up the NMI interval and change the functions cout() and cint() to use 68EM's character I/O scheme. The instructions are there already so you just have to uncomment out the appropriate instructions.

Jiggar

M6801 Micro controller

Besides the M6801's internal features it supports: M6821 PIA, four 7 segment LED display (Multiplexed), three high-side open collector drivers, four LED's and a RS232 serial interface.

The Gerber files are supplied so that a PCB can be manufactured for it. These will also give an idea of the board complexity and dimensions.

The PCB is a two signal layer type with plated through holes being essential.

There is no 5 volt regulator on board so it has to be supplied externally

In addition the communication protocol allows control of the four LED's too

Communications is achieved by a packet based message passing system using the standard 9600bps, 8 bit, 1 stop character transmitter/receiver.

Source code supplied here is written in 'C' using the Hi-tech™ 6801 Cross Compiler development environment.

This software is a companion set to the UNIX (LINUX) controlling program listed next.

The archive holds a good library full of functions designed to control the hardware of JIGGAR.

In all three executables are generated from this archive, when compiled. They are: jping - pings all defined JIGGAR boards, jmonitor - periodically monitors all defined JIGGAR boards, and jinput which reads input from all JIGGAR boards.

All program operations are determined by parameters given at the command line interface which will determine how, and where, it will communicate to JIGGAR boards.

A typical command line would look like: jping -h /dev/cua0 -b 9600 -s 1 -e 4

This would attempt to communicate to JIGGAR boards attached to serial port /dev/cua0 @ 9600bps. And would try to ping all JIGGAR's in the range of Unit 1 through to Unit 4.

ISD™ Sound chips can record from 12 seconds to several minutes of sound onto an analogue memory array (on chip) to be played back at another time. They have controls that work similar to an audio tape recorder, however, there is no fast-forward or rewind operation.

The firmware in Jiggar can help create a Master sound chip using original audio. Once you are happy with it the entire chips contents can be transferred across to a duplicate ISD™ recorder chips. All the sounds on the Master will be transferred across to a duplicate, or Slave, device.

To do that Jiggar is programmed to control both the Master and Slave sound chips allowing automated copying to occur. Hence there is two 20-pin IDC connectors on Jiggar named "Slave" and "Master". These hold all the signals needed for each chip.

To break these signals out to two separate chips, and provide a platform to hold the device requires another Printed Circuit Board code named Jiggar_Pod. It provides a simple way to house the connectors and sockets and provide easy access to the programming sockets.

Remember that the firmware expects there to be a 4*4 matrix keypad and Jiggar Pod PCB present.

I have also included the Public Domain cross-assembler (AS1.exe) so that you don't have to search all over the place for it.

The ETI662a General Purpose Computer was first published in Electronics Today International (Australia) on April, 1984. The article appeared on page 65 to 69 whose author is Peter Ihnat.

The computer is based on the (now obsolete) M6802 CPU from Motorola and included a Synertek 6522 VIA, 2K RAM and 8K ROM.

It served many purposes with a few projects published utilising it. I have had two boards since its first printing and have used them in many projects. Therefore this section of the M6800 page is dedicated to listing those projects and source codes that have been sitting on the shelf for so long. There will be people out there who will have these boards and may want to make better use of their own.

I have also redrawn the original schematic to allow it to be downloaded by anyone in PDF format. One day someone may find a lot of these CPU's in old equipment and may want to use them some where else. This information will help too in that effort.

The first program is a simple "LED Flasher". But is a lot more than that because all the hardware is initialised to support a 100Hz time base and software UART capable of 1200bps, 2400bps and 4800bps. By the time "main()" is called the system has been setup to be fully functional and ready to be used by the main application code.

Check the interface schematics out to get an idea of how the LEDs are wired to the board.

Parts of the code has been extracted from the "ears" multitasking kernel source code. A lot more of it will show in further programs on this platform.

The M6802 CPU will be kept very busy to keep all this going and appears to do quite well. 

Character terminal default speed is 1200bps. When connected type the command "help". It will display a list of operations and commands supported by the CLI. Most are standard memory edit, dump, process list, and kill, etc.

The schematic diagrams of all hardware has been included into the downloadable archive. They show how the whole system has been constructed with the ETI662a project sitting at the centre.

This software uses E.A.R.S. multi-task management code as the basis for the kernel. It has an I/O library that supports all hardware including the SLR2016 four digit dot matrix LED display.

An overall model of the software falls into three categories, and therefore processes, or contexts:

When it is up and running the system can form the outer control arm of a remote power supply switching node. That is: it can turn on and off lights, computers or other mains powered devices through programmed events or by another host computer.